A.C.R. Wijesundara Ranasinghe Appuhamilage MSc (Ranasinghe)

About Me

Specialized in Mixed-Mode IC designing, SoC Front-End and Back-End design flow and Semiconductor Sensors


Engineering & Materials Science
Discrete Cosine Transforms
Electric Potential
Energy Efficiency
Fir Filters
Flip Flop Circuits
Networks (Circuits)


Ranasinghe, A. C. , & Gerez, S. H. (2021). Novel Ultra-Low-Voltage Flip-Flops: Near-Vth Modeling and VLSI Integration. In 39th International Conference on Computer Design (ICCD) (pp. 57-65). IEEE. https://doi.org/10.1109/ICCD53106.2021.00021
Ranasinghe, A. C. , & Gerez, S. H. (2020). MEPNTC: A Standard-Cell Library Design Scheme Extending the Minimum-Energy-Point Operation of Near-Vth Computing. In Proceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020 (pp. 96-104). [9283594] IEEE. https://doi.org/10.1109/ICCD50377.2020.00032
Ranasinghe, A. C. , & Gerez, S. H. (2020). Ultra-Low Voltage 4-to-2 Compressors for Near-Vth Computing. In IEEE International Symposium on Circuits and Systems (ISCAS) IEEE. https://doi.org/10.1109/ISCAS45731.2020.9181126
Anuradha Chathuranga Ranasinghe , & Gerez, S. H. (2020). Glitch-Optimized Circuit Blocks for Low-Power High-Performance Booth Multipliers. IEEE transactions on very large scale integration (VLSI) systems, 28(9), 2028-2041. [9149668]. https://doi.org/10.1109/TVLSI.2020.3009239

Contact Details

Visiting Address

University of Twente
Drienerlolaan 5
7522 NB Enschede
The Netherlands

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Mailing Address

University of Twente
P.O. Box 217
7500 AE Enschede
The Netherlands