Expertise
System-On-Chip
Avionics
Costs
Networks (Circuits)
Monitoring
Aging Of Materials
Defects
Digital To Analog Conversion
Defects
Electronics
Clocks
Cyber Physical System
Temperature
Electric Delay Lines
Built-In Self Test
Testing
Organizations
Publications
Recent
Pathrose Vareed, J., Ali, G., & Kerkhoff, H. G. (2018). IJTAG compatible analogue embedded instruments for MPSoC life-time prediction. In 2018 IEEE 19th Latin-American Test Symposium (LATS) (pp. 1-4). DOI: 10.1109/LATW.2018.8349691
Kerkhoff, H. G., Ali, G., Wan, J., Ibrahim, A. M. Y., & Pathrose Vareed, J. (2017). Applying IJTAG-compatible embedded instruments for lifetime enhancement of analog front-ends of cyber-physical systems. 1-6. Paper presented at 25th IFIP/IEEE International Conference on Very Large Scale Intergration 2017, Abu Dhabi, United Arab Emirates.DOI: 10.1109/VLSI-SoC.2017.8203464
Kerkhoff, H. G., Ali, G., Ebrahimi, H., & Ibrahim, A. M. Y. (2017). An automotive MP-SoC featuring an advanced embedded instrument infrastructure for high dependability. In 2017 International Test Conference in Asia (ITC-Asia) (pp. 65-70). DOI: 10.1109/ITC-ASIA.2017.8097113
Ibrahim, A. M. Y., & Kerkhoff, H. G. (2017). A cost-efficient dependability management framework for self-aware system-on-chips based on IEEE 1687. In 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS) (pp. 1-2). IEEE. DOI: 10.1109/IOLTS.2017.8046166
Ibrahim, A. M. Y., & Kerkhoff, H. G. (2017). Structured Scan Patterns Retargeting for Dynamic Instruments Access. In 2017 IEEE 35th VLSI Test Symposium (VTS) IEEE. DOI: 10.1109/VTS.2017.7928955
Rohani, A., Ebrahimi, H., & Kerkhoff, H. G. (2016). A software framework to calculate local temperatures in CMOS processors. 183-188. Paper presented at 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, Bremen, Germany.DOI: 10.1109/PATMOS.2016.7833685
Kerkhoff, H. G., & Ebrahimi, H. (2016). Investigation of Intermittent Resistive Faults in Digital CMOS Circuits. Journal of circuits, systems and computers, 25(03), [1640023]. DOI: 10.1142/S0218126616400235
Wan, J. (Ed.), Wan, J. (Ed.), & Kerkhoff, H. G. (2016). Simulating NBTI degradation in arbitrary stressed analog/mixed-signal environments. IEEE transactions on nanotechnology, 15(2), 137-148. DOI: 10.1109/TNANO.2015.2505092
UT Research Information System
Courses
Contact Details
Visiting Address
University of Twente
Faculty of Electrical Engineering, Mathematics & Computer Science
Zilverling
(building no. 11), room 5078
Hallenweg 19
7522NH Enschede
The Netherlands
Mailing Address
University of Twente
Faculty of Electrical Engineering, Mathematics & Computer Science
Zilverling
5078
P.O. Box 217
7500 AE Enschede
The Netherlands