Carré

dr. H.S. Bindra (Harijot Singh)

Assistant Professor
EEMCS-EE-ICD
Carré
h.s.bindra@utwente.nl
+31534895179
Business card

Expertise

  • Engineering

    • Energy Engineering
    • Sampling Technique
    • Structure Activity Relationship
    • Drives

  • Earth and Planetary Sciences

    • Input
    • Bias
    • Latch
    • CMOS

Organisations

Low Energy Circuit Design Techniques

Analog power consumption does not depend on supply voltage and unlike digital, doesn’t benefit from technology scaling. The focus of this research work is to investigate CMOS circuit design techniques for minimizing the energy consumption for a given analog operation.

Publications

2025

A Programmable Filtering and Frequency Translation by Aliasing IF Receiver With Alias and Harmonic Rejection (2025)IEEE journal of solid-state circuits, 60(6), 1997-2012. Article 0018-9200. Ramkumar, V. K., Huiskamp, M., Bindra, H. S., Klumperink, E. & Nauta, B.https://doi.org/10.1109/JSSC.2024.3481879A 12.8GS/s Sub-Sampling ADC Front-End With 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI (2025)In A 12.8GS/s Sub-Sampling ADC Front-End With 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI (pp. 76-78). Heel, J., Bindra, H. S., Louwsma, S., Dezzani, A. & Nauta, B.https://doi.org/10.1109/ISSCC49661.2025.10904786A 0.4–0.9 V Supply Voltage-Flexible Third-Order Passive ΔΣ Modulator With Switched-Capacitor Loop Filter Achieving 71.9 dB Peak SNDR at 4 MHz Bandwidth (2025)IEEE transactions on circuits and systems I: regular papers (E-pub ahead of print/First online). Ponte, J., Nauta, B. & Bindra, H. S.https://doi.org/10.1109/TCSI.2025.3536610

2024

Circuit with a latch having sets of inverters (2024)[Patent › Patent]. Cents, R., Ponte, J., Bindra, H. S. & Nauta, B.

2023

A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation (2023)IEEE transactions on circuits and systems II: express briefs, 70(5), 1719-1723. Shen, Y., Li, H., Bindra, H. S., Cantatore, E. & Harpe, P.https://doi.org/10.1109/TCSII.2023.3259821

2022

A 60 GHz Pulsed Coherent Radar for Online Monitoring of the Withering Condition of Leaves (2022)Sensors and Actuators A: Physical, 343. Article 113693. Hoog, N. A., van den Berg, T. E. & Bindra, H. S.https://doi.org/10.1016/j.sna.2022.113693Reconstructing Aliased Frequency Spectra by Using Multiple Sample Rates (2022)IEEE transactions on circuits and systems I: regular papers, 69(3), 999 - 1012. Huiskamp, M., Oude Alink, M. S., Nauta, B., Annema, A. J. & Bindra, H. S.https://doi.org/10.1109/TCSI.2021.3131273A 174μVRMS Input Noise, 1 G8/s Comparator in 22nm FDSOI with a Dynamic-Bias Preamplifier Using Tail Charge Pump and Capacitive Neutralization Across the Latch (2022)In 2022 IEEE International Solid-State Circuits Conference (ISSCC) (pp. 62-64). IEEE. Bindra, H. S., Ponte, J. & Nauta, B.https://doi.org/10.1109/ISSCC42614.2022.9731728

2021

Energy Efficient Start-up of Crystal Oscillators using Stepwise Charging (2021)IEEE journal of solid-state circuits, 56(8), 2427-2437. Article 9373983. Lechevallier, J. B., Bindra, H. S., van der Zee, R. A. R. & Nauta, B.https://doi.org/10.1109/JSSC.2021.3061032

Research profiles

Low Energy Circuit Design Techniques

Analog power consumption does not depend on supply voltage and unlike digital, doesn’t benefit from technology scaling. The focus of this research work is to investigate CMOS circuit design techniques for minimizing the energy consumption for a given analog operation.

Address

University of Twente

Carré (building no. 15)
Hallenweg 23
7522 NH Enschede
Netherlands

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Organisations

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