dr.ir. N. Alachiotis (Nikolaos)

Nikolaos Alachiotis completed his undergraduate studies at the ECE department of the Technical University of Crete (Greece) and his Ph.D. at the Informatics department of the Technische Universität München (Germany) in 2008 and 2012, respectively. His research interests lie in the fields of computer architecture, parallel computing, reconfigurable computing, and Bioinformatics. He joined the Computer Architecture Lab at Carnegie Mellon University as a post-doctoral researcher in 2014, where he led the design of a generic acceleration architecture for 3D-stacked DRAMs (DARPA-funded PERFECT project). He joined the Computer Architecture and VLSI Systems Laboratory at FORTH-ICS in September 2016, where he worked on architecture design and hardware development for specialized acceleration in disaggregated datacenters (EU-funded dReDBox project). In June 2019, he joined the Telecommunications Systems Research Institute to work on automated generation of hardware-accelerated software for deployment on the cloud (EU-funded EDRA project). He is with the CAES group at UT since June 2020.

Engineering & Materials Science

# Data Storage Equipment
# Dna
# Field Programmable Gate Arrays (Fpga)
# Genomics
# Particle Accelerators
# Phylogeny

Mathematics

# Field Programmable Gate Array

Medicine & Life Sciences

# Genome

Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS), Computer Architecture Design and Test for Embedded Systems (CAES)

Knoben, P. , & Alachiotis, N. (2023). Improving Performance of Hardware Accelerators by Optimizing Data Movement: A Bioinformatics Case Study. Electronics, 12(3), [586]. https://doi.org/10.3390/electronics12030586

Alachiotis, N., Low, T. M., & Pavlidis, P. (2022). Editorial: Scalable Bioinformatics: Methods, Software Tools, and Hardware Architectures. Frontiers in Genetics, 12, [822986]. https://doi.org/10.3389/fgene.2021.822986

Corts, R., Sterenborg, N. , & Alachiotis, N. (2022). Accelerated LD-based selective sweep detection using GPUs and FPGAs. In 2022 IEEE 36th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2022 (pp. 196-205). IEEE. https://doi.org/10.1109/IPDPSW55747.2022.00044

Sankaran, A., Detterer, P., Kannan, K. , Alachiotis, N., & Corradi, F. (2022). An Event-driven Recurrent Spiking Neural Network Architecture for Efficient Inference on FPGA. In ICONS 2022: Proceedings of International Conference on Neuromorphic Systems 2022 (pp. 1–8). [12] Association for Computing Machinery. https://doi.org/10.1145/3546790.3546802

Pennestri, P. , Huang, Y. , & Alachiotis, N. (2022). A novel approximation scheme for floating-point square root and inverse square root for FPGAs. In 2022 11th International Conference on Modern Circuits and Systems Technologies, MOCAST 2022 IEEE. https://doi.org/10.1109/MOCAST54814.2022.9837550

Pfeifer, B., Voicu-Spineanu, A., Schimek, M. G. , & Alachiotis, N. (2022). Integrative hierarchical ensemble clustering for improved disease subtype discovery. In Y. Huang, L. Kurgan, F. Luo, X. T. Hu, Y. Chen, E. Dougherty, A. Kloczkowski, & Y. Li (Eds.), 2021 IEEE International Conference on Bioinformatics and Biomedicine (BIBM) (pp. 720-725) https://doi.org/10.1109/BIBM52615.2021.9669608

Alachiotis, N., Skrimponis, P., Pissadakis, M., & Pnevmatikatos, D. (2022). Scalable Phylogeny Reconstruction with Disaggregated Near-memory Processing. ACM Transactions on Reconfigurable Technology and Systems, 15(3), 1-32. [25]. https://doi.org/10.1145/3484983

Semagn, K., Iqbal, M. , Alachiotis, N., N’Diaye, A., Pozniak, C., & Spaner, D. (2021). Genetic diversity and selective sweeps in historical and modern Canadian spring wheat cultivars using the 90K SNP array. Scientific reports, 11(1), 1-16. [23773]. https://doi.org/10.1038/s41598-021-02666-5

Irmak, H. , Ziener, D. , & Alachiotis, N. (2021). Increasing Flexibility of FPGA-based CNN Accelerators with Dynamic Partial Reconfiguration. In 2021 31st International Conference on Field-Programmable Logic and Applications (FPL) (pp. 306-311). [9556462] IEEE. https://doi.org/10.1109/FPL53798.2021.00061

Irmak, H., Corradi, F., Detterer, P. , Alachiotis, N. , & Ziener, D. (2021). A Dynamic Reconfigurable Architecture for Hybrid Spiking and Convolutional FPGA-Based Neural Network Designs. Journal of Low Power Electronics and Applications, 11(3), [32]. https://doi.org/10.3390/jlpea11030032

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+31534891352

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n.alachiotis@utwente.nl

Visiting Address

University of Twente
Faculty of Electrical Engineering, Mathematics and Computer Science
Zilverling (building no. 11), room 5035
Hallenweg 19
7522NH Enschede
The Netherlands

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Mailing Address

University of Twente
Faculty of Electrical Engineering, Mathematics and Computer Science
Zilverling 5035
P.O. Box 217
7500 AE Enschede
The Netherlands

Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS), Computer Architecture Design and Test for Embedded Systems (CAES)

University of Twente Drienerlolaan 5
7522 NB Enschede

+31 (0)53 489 9111
info@utwente.nl
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