Research
Arbitrary Digital Clock Generation
The goal of this project is to generate highly accurate clocks up to a few GHz with an arbitrarily programmable frequency, exploiting digital CMOS techniques and mixed analog-digital blocks for timing correction. The core idea is to derive an arbitrarily programmable clock frequency from a fixed high-frequency reference clock by digital dividers and other digital synthesis techniques. It is known that this is possible in principle, but it is far from obvious how this can be done in a power efficient way. A key challenge is quantization or numerical rounding related to the use of a finite number of bits, leading to residual timing errors and unwanted frequency components (“spurious responses”).
Contact Details
Visiting Address
University of Twente
Faculty of Electrical Engineering, Mathematics and Computer Science
Carré
(building no. 15), room C2641
Hallenweg 23
7522NH Enschede
The Netherlands
Mailing Address
University of Twente
Faculty of Electrical Engineering, Mathematics and Computer Science
Carré
C2641
P.O. Box 217
7500 AE Enschede
The Netherlands