Expertise
Computer Science
- Computing
- Design
- Energy Efficiency
- Standards
- Approximation (Algorithm)
- Flip-Flop
- Simulation
- Vectors
Organisations
Publications
2021
Novel Ultra-Low-Voltage Flip-Flops: Near-Vth Modeling and VLSI Integration (2021)In 39th International Conference on Computer Design (ICCD) (pp. 57-65). IEEE. Ranasinghe, A. C. & Gerez, S. H.https://doi.org/10.1109/ICCD53106.2021.00021
2020
MEPNTC: A Standard-Cell Library Design Scheme Extending the Minimum-Energy-Point Operation of Near-Vth Computing (2020)In Proceedings - 2020 IEEE 38th International Conference on Computer Design, ICCD 2020 (pp. 96-104). Article 9283594. IEEE. Ranasinghe, A. C. & Gerez, S. H.https://doi.org/10.1109/ICCD50377.2020.00032Glitch-Optimized Circuit Blocks for Low-Power High-Performance Booth Multipliers (2020)IEEE transactions on very large scale integration (VLSI) systems, 28(9), 2028-2041. Article 9149668. Anuradha Chathuranga Ranasinghe & Gerez, S. H.https://doi.org/10.1109/TVLSI.2020.3009239Ultra-Low Voltage 4-to-2 Compressors for Near-Vth Computing (2020)In IEEE International Symposium on Circuits and Systems (ISCAS). IEEE. Ranasinghe, A. C. & Gerez, S. H.https://doi.org/10.1109/ISCAS45731.2020.9181126
Research profiles
Courses academic year 2024/2025
Courses in the current academic year are added at the moment they are finalised in the Osiris system. Therefore it is possible that the list is not yet complete for the whole academic year.
- 191210750 - System-on-Chip Design
- 191211208 - Internship EE
- 191211219 - Master Thesis Project
- 191211590 - System-on-Chip for Embedded Systems
- 191211650 - Multi-Disciplinary Design Project
- 201900223 - Capita Selecta Electrical Engineering
- 202001162 - Bachelor Thesis EE
- 202001434 - Internship EMSYS
- 202300070 - Final Project EMSYS
Courses academic year 2023/2024
- 191210750 - System-on-Chip Design
- 191210950 - IDSP
- 191211208 - Internship EE
- 191211219 - Master Thesis Project
- 191211590 - System-on-Chip for Embedded Systems
- 191211650 - Multi-Disciplinary Design Project
- 201600017 - Final Project Preparation
- 201900200 - Final Project EMSYS
- 201900223 - Capita Selecta Electrical Engineering
- 202001162 - Bachelor Thesis EE
- 202001434 - Internship EMSYS
- 202300070 - Final Project EMSYS
Address
University of Twente
Zilverling (building no. 11), room 5033
Hallenweg 19
7522 NH Enschede
Netherlands
University of Twente
Zilverling 5033
P.O. Box 217
7500 AE Enschede
Netherlands
Organisations
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