T.T. Smit (Tijmen)

Tijmen holds a B.Sc. in Creative Technology and an M.Sc. in Embedded Systems from the University of Twente. During his master's program, he graduated from the CAES group, where he developed an innovative fault injection framework. This research experience paved the way for his current role as a Ph.D. candidate in the Dependable Computing Systems group within CAES, a collaborative initiative involving the University of Twente, ESA, and Technolution. Tijmen's research is centered on evaluating the reliability and security of (RISC-V) computer architectures and emerging technologies. He employs a comprehensive approach that spans every stage of hardware design, including simulation, FPGA emulation, and ASIC implementation, utilizing advanced techniques such as radiation hardness assurance and fault injection to ensure robust system performance.

Expertise

• Engineering

  • Soft Error
  • Clock Cycle
  • Granularity
  • Program Counter
  • Error Detector
  • Memory Subsystem
  • Neutron Beam

• Computer Science

  • System Architecture

Organisations

Publications

Research profiles

Courses academic year 2025/2026

Courses in the current academic year are added at the moment they are finalised in the Osiris system. Therefore it is possible that the list is not yet complete for the whole academic year.

Courses academic year 2024/2025

Address

University of Twente

Zilverling (building no. 11), room 5054
Hallenweg 19
7522 NH Enschede
Netherlands

Navigate to location

Organisations